Systems and Means of Informatics
2014, Volume 24, Issue 3, pp 63-77
SELF-TIMED FUSED MULTIPLY-ADD UNIT: PRACTICAL IMPLEMENTATION
- Y. Stepchenkov
- Y. Diachenko
- Y. Rogdestvenski
- N. Morozov
- D. Stepchenkov
- A. Rogdestvenskene
- A. Surkov
Abstract
Paper presents the results of designing Speed-Independed Fused Multiply-Add (SIFMA) variants compliant with the IEEE 754 Standard. SIFMA performs either one double precision FMA operation or one or two single precision operations simultaneously under three operands. SIFMA was designed for the standard 65-nanometer CMOS (complementary metall-oxide- semiconductor) technology. It uses both a standard cell library and a self-timed cell library designed in IPI RAS. One SIFMA variant operates with a synchronous environment, while another works with an asynchronous environment.
Both variants provide an average performance up to 1 GFlops for 1 -volt supply and environment temperature of 25 °C. At these conditions, energy consumption does not exceed 970 mJ/GHz.
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[+] About this article
Title
SELF-TIMED FUSED MULTIPLY-ADD UNIT: PRACTICAL IMPLEMENTATION
Journal
Systems and Means of Informatics
Volume 24, Issue 3, pp 63-77
Cover Date
2013-11-30
DOI
10.14357/08696527140305
Print ISSN
0869-6527
Publisher
Institute of Informatics Problems, Russian Academy of Sciences
Additional Links
Key words
self-timed circuit; ternary coding; multiplier; adder; subtracter; pipeline; indication
Authors
Y. Stepchenkov  , Y. Diachenko ,
Y. Rogdestvenski , N. Morozov ,
D. Stepchenkov , A. Rogdestvenskene ,
and A. Surkov 
Author Affiliations
Institute of Informatics Problems, Russian Academy of Sciences, 44-2 Vavilov Str., Moscow 119333, Russian Federation
Scientific Research Institute for System Studies, Russian Academy of Sciences, 36 bld. 1 Nakhimovsky Prosp., Moscow 117218, Russian Federation
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